Microchip Technology TC7129 Instructions d'utilisation et d'entretien

2004 Microchip Technology Inc. DS21459C-page 1

TC7129

Features

• Count Resolution: ±19,999

• Resolution on 200 mV Scale: 10µV

• True Differential Input and Reference

• Low Power Consumption: 500µA at 9V

• Direct LCD Driver for 4-1/2 Digits, Decimal Points,

Low Battery Indicator, and Continuity Indicator

• Overrange and Underrange Outputs

• Range Select Input: 10:1

• High Common Mode Rejection Ratio: 110 dB

• External Phase Compensation Not Required

Applications

• Full-Featured Multimeters

• Digital Measurement Devices

Device Selection Table

General Description

The TC7129 is a 4-1/2 digit Analog-to-Digital Converter

(ADC) that directly drives a multiplexed Liquid Crystal

Display (LCD). Fabricated in high-performance, low-

power CMOS, the TC7129 ADC is designed specifi-

cally for high-resolution, battery-powered digital multi-

meter applications. The traditional dual-slope method

of A/D conversion has been enhanced with a succes-

sive integration technique to produce readings accu-

rate to better than 0.005% of full-scale and resolution

down to 10 µV per count.

The TC7129 includes features important to multimeter

applications. It detects and indicates low battery condi-

tion. A continuity output drives an annunciator on the

display and can be used with an external driver to sound

an audible alarm. Overrange and underrange outputs,

along with a range-change input, provide the ability to

create auto-ranging instruments. For snapshot read-

ings, the TC7129 includes a latch-and-hold input to

freeze the present reading. This combination of features

makes the TC7129 the ideal choice for full-featured

multimeter and digital measurement applications.

Typical Application

Package

Code Pin

Layout Package Temperature

Range

TC7129CPL Normal 40-PinPDIP 0°C to +70°C

TC7129CKW Formed 44-PinPQFP 0°C to +70°C

TC7129CLW – 44-PinPLCC 0°C to +70°C

TC7129

1234567

1011

13141516171819

3837

3534

323130

27262524232221

Low Battery Continuity

V+

5 pF

120 kHz

10 pF

0.1 µF

kΩ

0.1

µF

100 kΩ

1 µF

0.1 µF

150 kΩ

10 kΩ

V+

VIN

–

*Note: RC network between pins 26 and 28 is not required.

330 kΩ

4-1/2 Digit Analog-to-Digital Converters with

On-Chip LCD Drivers

TC7129

DS21459C-page 2 2004 Microchip Technology Inc.

Package Types

18 19 20 21 23 24

6543 1442

43 42 41 40

25 26 27 28

3214

3115

3016

2917

12 TC7129CLW

F1, E1, DP1

B2, C2, BATT

A2, G2, D2

F2, E2, DP2

B3, C3, MINUS

A3, G3, D3

F3, E3, DP3

B4, C4, BC5

A4, G4, D4

F4, E4, DP4

REF LO

REF HI

IN HI

IN LO

BUFF

CREF-

CREF+

COMMON

CONTINUITY

INT OUT

A1, G1, D1

B1, C1, CONT

ANNUNCIATOR

OSC3

OSC1

OSC2

DP1

DP2

RANGE

DGND

BP3

BP2

BP1

VDISP

DP4/OR

DP3/UR

LATCH/HOLD

V+

V-

INT IN

TC7129CKW

12 13 14 15 17 18

44 43 42 41 39 3840

37 36 35 34

19 20 21 22

A1, G1, D1

B1, C1, CONT

ANNUNCIATOR

OSC3

OSC1

OSC2

DP1

DP2

RANGE

DGND

REF LO

REF HI

IN HI

IN LO

BUFF

CREF-

CREF+

COMMON

CONTINUITY

INT OUT

F1, E1, DP1

B2, C2, BATT

A2, G2, D2

F2, E2, DP2

B3, C3, MINUS

A3, G3, D3

F3, E3, DP3

B4, C4, BC5

A4, G4, D4

F4, E4, DP4

BP3

BP2

BP1

VDISP

DP4/OR

DP3/UR

LATCH/HOLD

V+

V-

INT IN

TC7129CPL

40-Pin PDIP

44-Pin QFP 44-Pin PLCC

OSC2

DP1

DP2

RANGE

DGND

REF LO

REF HI

IN HI

IN LO

BUFF

CREF-

CREF+

COMMON

CONTINUITY

INT OUT

INT IN

V+

V-

DP3/UR

OSC1

OSC3

ANNUNICATOR

B1, C1, CONT

A1, G1, D1

F1, E1, DP1

B2, C2, LO BATT

A2, G2, D2

F2, E2, DP2

B3, C3, MINUS

A3, G3, D3

F3, E3, DP3

B4, C4, BC5

A4, G4, D4

F4, E4, DP4

BP3

BP2

BP1

VDISP

DP4/OR

Display

Output

Lines

LATCH/HOLD

2004 Microchip Technology Inc. DS21459C-page 3

TC7129

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (V+ to V-).......................................15V

Reference Voltage (REF HI or REF LO)........ V+toV–

Input Voltage (IN HI or IN LO) (Note 1).......... V+ to V–

VDISP.......................................... V+ to (DGND – 0.3V)

Digital Input (Pins 1, 2, 19, 20,

21, 22, 27, 37, 39, 40)..........................DGND to V+

Analog Input (Pins 25, 29, 30) ....................... V+ to V–

Package Power Dissipation (TA ≤70°C)

Plastic DIP .....................................................1.23W

PLCC .............................................................1.23W

Plastic QFP....................................................1.00W

Operating Temperature Range ............... 0°C to +70°C

Storage Temperature Range..............-65°C to +150°C

*Stresses above those listed under “Absolute Maximum

Ratings” may cause permanent damage to the device. These

are stress ratings only and functional operation of the device

at these or any other conditions above those indicated in the

operation sections of the specifications is not implied.

Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability.

TC7129 ELECTRICAL SPECIFICATIONS

Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA= +25°C, fCLK = 120 kHz, unless otherwise indicated.

Pin numbers refer to 40-pin DIP.

Symbol Parameter Min Typ Max Unit Test Conditions

Input

Zero Input Reading –0000 0000 +0000 Counts VIN = 0V, 200 mV scale

Zero Reading Drift — ±0.5 — µV/°C VIN = 0V, 0°C < TA< +70°C

Ratiometric Reading 9996 — 10000 Counts VIN = VREF = 1000 mV,

Range = 2V

Range Change Accuracy 0.9999 1.0000 1.0001 Ratio VIN = 1V on High Range,

VIN = 0.1V on Low Range

RE Rollover Error — 1 2 Counts VIN– = VIN+ = 199 mV

NL Linearity Error — 1 — Counts 200mV Scale

CMRR Common Mode Rejection Ratio — 110 — dB VCM = 1V, VIN = 0V,

200 mV scale

CMVR Common Mode Voltage Range — (V-) +

1.5 —VV

IN = 0V

— (V+) – 1 — V 200 mV scale

eNNoise (Peak-to-Peak Value not

Exceeded 95% of Time) — 14—µV

P-P VIN = 0V

200 mV scale

IIN Input Leakage Current — 1 10 pA VIN = 0V, pins 32, 33

Scale Factor Temperature

Coefficient — 2 7 ppm/°C VIN = 199 mV,

0°C < TA< +70°C

External VREF = 0 ppm/°C

Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 µA. Currents above

this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.

Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.

TC7129

DS21459C-page 4 2004 Microchip Technology Inc.

Power

VCOM Common Voltage 2.8 3.2 3.5 V V+ to pin 28

Common Sink Current — 0.6 — mA ∆Common = +0.1V

Common Source Current — 10 — µA∆Common = -0.1V

DGND Digital Ground Voltage 4.5 5.3 5.8 V V+ to pin 36, V+ to V– = 9V

Sink Current — 1.2 — mA ∆DGND = +0.5V

Supply Voltage Range 6 9 12 V V+ to V–

ISSupply Current Excluding

Common Current — 0.8 1.3 mA V+ to V– = 9V

fCLK Clock Frequency — 120 360 kHz

VDISP Resistance — 50 — kΩVDISP to V+

Low Battery Flag Activation

Voltage 6.3 7.2 7.7 V V+ to V–

Digital

Continuity Comparator Threshold

Voltages 100 200 — mV VOUT pin 27 = High

— 200 400 mV VOUT pin 27 = Low

Pull-down Current — 2 10 µA Pins 37, 38, 39

“Weak Output” Current

Sink/Source — 3/3—µA Pins 20, 21 sink/source

— 3/9—µA Pin 27 sink/source

Pin 22 Source Current — 40 — µA

Pin 22 Sink Current — 3 — µA

TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED)

Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA= +25°C, fCLK = 120 kHz, unless otherwise indicated.

Pin numbers refer to 40-pin DIP.

Symbol Parameter Min Typ Max Unit Test Conditions

Note 1: Input voltages may exceed supply voltages, provided input current is limited to ±400 µA. Currents above

this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.

Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.

2004 Microchip Technology Inc. DS21459C-page 5

TC7129

2.0 PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 2-1.

TABLE 2-1: PIN FUNCTION TABLE

Pin No.

40-Pin PDIP Pin No.

44-Pin PQFP Pin No.

44-Pin PLCC Symbol Function

1 40 2 OSC1 Input to first clock inverter.

2 41 3 OSC3 Output of second clock inverter.

3 42 4 ANNUNCIATOR Backplane square wave output for driving annunciators.

443 5B

1, C1, CONT Output to display segments.

544 6A

1, G1, D1Output to display segments.

617F

1, E1, DP1Output to display segments.

728B

2, C2,

LO BATT Output to display segments.

839A

2, G2, D2Output to display segments.

9410F

2, E2, DP2Output to display segments.

10 5 11 B3, C3, MINUS Output to display segments.

11 7 13 A3, G3, D3Output to display segments.

12 8 14 F3, E3, DP3Output to display segments.

13 9 15 B4, C4, BC5Output to display segments.

14 10 16 A4, D4, G4Output to display segments.

15 11 17 F4, E4, DP4Output to display segments.

16 12 18 BP3Backplane #3 output to display.

17 13 19 BP2Backplane #2 output to display.

18 14 20 BP1Backplane #1 output to display.

19 15 21 VDISP Negative rail for display drivers.

20 16 22 DP4/OR Input: When high, turns on most significant decimal point.

Output: Pulled high when result count exceeds ±19,999.

21 18 24 DP3/UR Input: Second-most significant decimal point on when high.

Output: Pulled high when result count is less than ±1000.

22 19 25 LATCH/HOLD Input: When floating, ADC operates in Free Run mode. When

pulled high, the last displayed reading is held. When pulled low,

the result counter contents are shown incrementing during the

de-integrate phase of cycle.

Output: Negative going edge occurs when the data latches are

updated. Can be used for converter status signal.

23 20 26 V– Negative power supply terminal.

24 21 27 V+ Positive power supply terminal and positive rail for display

drivers.

25 22 28 INT IN Input to integrator amplifier.

26 23 29 INT OUT Output of integrator amplifier.

27 24 30 CONTINUITY Input: When low, continuity flag on the display is off. When high,

continuity flag is on.

Output: High when voltage between inputs is less than +200 mV.

Low when voltage between inputs is more than +200 mV.

28 25 31 COMMON Sets common mode voltage of 3.2V below V+ for DE, 10X, etc.

Can be used as pre-regulator for external reference.

29 26 32 CREF+ Positive side of external reference capacitor.

30 27 33 CREF– Negative side of external reference capacitor.

31 29 35 BUFFER Output of buffer amplifier.

32 30 36 IN LO Negative input voltage terminal.

33 31 37 IN HI Positive input voltage terminal.

34 32 38 REF HI Positive reference voltage.

35 33 39 REF LO Negative reference voltage

TC7129

DS21459C-page 6 2004 Microchip Technology Inc.

36 34 40 DGND Internal ground reference for digital section. See Section 4.2.1

“±5V Power Supply”.

37 35 41 RANGE 3 µA pull-down for 200 mV scale. Pulled high externally for 2V

scale.

38 36 42 DP2Internal 3 µA pull-down. When high, decimal point 2 will be on.

39 37 43 DP1Internal 3 µA pull-down. When high, decimal point 1 will be on.

40 38 44 OSC2 Output of first clock inverter. Input of second clock inverter.

— 6,17, 28, 39 12, 23, 34, 1 NC No connection.

TABLE 2-1: PIN FUNCTION TABLE (CONTINUED)

Pin No.

40-Pin PDIP Pin No.

44-Pin PQFP Pin No.

44-Pin PLCC Symbol Function

2004 Microchip Technology Inc. DS21459C-page 7

TC7129

3.0 DETAILED DESCRIPTION

(All pin designations refer to 40-pin PDIP.)

The TC7129 is designed to be the heart of a high-

resolution analog measurement instrument. The only

additional components required are a few passive

elements: a voltage reference, a LCD and a power

source. Most component values are not critical;

substitutes can be chosen based on the information

given below.

The basic circuit for a digital multimeter application is

shown in Figure 3-1. See Section 4.0 “Typical Appli-

cations”, for variations. Typical values for each

component are shown. The sections below give

component selection criteria.

3.1 Oscillator (XOSC, CO1, CO2, RO)

The primary criterion for selecting the crystal oscillator

is to choose a frequencythat achieves maximum rejec-

tion of line frequency noise. To do this, the integration

phase should last an integral number of line cycles.

The integration phase of the TC7129 is 10,000 clock

cycles on the 200 mV range and 1000 clock cycles on

the 2V range. One clock cycle is equal to two oscillator

cycles. For 60 Hz rejection, the oscillator frequency

should be chosen so that the period of one line cycle

equals the integration time for the 2V range.

EQUATION 3-1:

This equation gives an oscillator frequency of 120 kHz.

A similar calculation gives an optimum frequency of

100 kHz for 50 Hz rejection.

The resistor and capacitor values are not critical; those

shown work for most applications. In some situations,

the capacitor values may have to be adjusted to

compensate for parasitic capacitance in the circuit. The

capacitors can be low-cost ceramic devices.

Some applications can use a simple RC network

instead of a crystal oscillator. The RC oscillator has

more potential for jitter, especially in the least

significant digit. See Section 4.5 “RC Oscillator”.

3.2 Integrating Resistor (RINT)

The integrating resistor sets the charging current for

the integrating capacitor. Choose a value that provides

a current between 5 µA and 20 µA at 2V, the maximum

full-scale input. The typical value chosen gives a

charging current of 13.3 µA:

EQUATION 3-1:

Too high a value for RINT increases the sensitivity to

noise pickup and increases errors due to leakage

current. Too low a value degrades the linearity of the

integration, leading to inaccurate readings.

1/60 second = 16.7 msec =

1000 clock cycles *2 OSC cycles/clock cycle

OSC Frequency

ICHARGE = 2V

150 kΩ13.3 µA

TC7129

DS21459C-page 8 2004 Microchip Technology Inc.

Figure 3-1: Standard Circuit.

3.3 Integrating Capacitor (CINT)

The charge stored in the integrating capacitor during

the integrate phase is directly proportional to the input

voltage. The primary selection criterion for CINT is to

choose a value that gives the highest voltage swing

while remaining within the high-linearity portion of the

integrator output range.An integrator swing of 2V is the

recommended value. The capacitor value can be

calculated using the following equation:

EQUATION 3-1:

Using the values derived above (assuming 60 Hz

operation), the equation becomes:

EQUATION 3-2:

The capacitor should have low dielectric absorption to

ensure good integration linearity. Polypropylene and

Teflon®capacitors are usually suitable. A good

measurement of the dielectric absorption is to connect

the reference capacitor across the inputs by

connecting:

Pin-to-Pin:

20 →33 (CREF+ to IN HI)

30 →32 (CREF– to IN LO)

A reading between 10,000 and 9998 is acceptable;

anything lower indicates unacceptably high dielectric

absorption.

3.4 Reference Capacitor (CREF)

The reference capacitor stores the reference voltage

during several phases of the measurement cycle. Low

leakage is the primary selection criterion for this com-

ponent. The value must be high enough to offset the

effect of stray capacitance at the capacitor terminals. A

value of at least 1 µF is recommended.

1234567

1011

13141516171819

3837

3534

323130

27262524232221

Low Battery Continuity

V+

5 pF

120

kHz

10 pF

0.1 µF

kΩ

0.1

µF

100 kΩ

CINT

0.1 µF

V+

VIN

– +

330 kΩ

Crystal

CO2

CRF

DREF

RREF

CIF

RIF

CREF+

1 µF

10 kΩ

RBIAS

150 kΩ

RINT

OSC1

OSC3

ANNUNC

VDISP

DP4/OR

Display Drive Outputs

DP3/UR

LATCH/

HOLD

V–

V+

INT IN

INT OUT

CONTINUITY

COMMON

CREF+

CREF–

BUFF

IN LO

IN HI

REF HI

REF LO

DGND

RANGE

DP2

DP1

OSC2

TC7129

CO1

CINT = tINT x IINT

VSWING

Where tINT is the integration time.

CINT = = 0.1 µA

16.7 msec x 13.3 µA

2004 Microchip Technology Inc. DS21459C-page 9

TC7129

3.5 Voltage Reference

(DREF, RREF, RBIAS, CRF)

The reference potentiometer (RREF) provides an

adjustment for adjusting the reference voltage; any

value above 20 kΩis adequate. The bias resistor

(RBIAS) limits the current through DREF to less than

150 µA. The reference filter capacitor (CRF) forms an

RC filter with RBIAS to help eliminate noise.

3.6 Input Filter (RIF, CIF)

For added stability, an RC input noise filter is usually

included in the circuit. The input filter resistor value

should not exceed 100 kΩ. A typical RC time constant

value is 16.7 msec to help reject line frequency noise.

The input filter capacitor should have low leakage for a

high-impedance input.

3.7 Battery

The typical circuit uses a 9V battery as a power source.

However, any value between 6V and 12V can be used.

For operation from batteries with voltages lower than

6V and for operation from power supplies, see

Section 4.2 “Powering the TC7129”.

4.0 TYPICAL APPLICATIONS

4.1 TC7129 as a Replacement Part

The TC7129 is a direct pin-for-pin replacement part for

the ICL7129. Note, however, that the ICL7129 requires

a capacitor and resistor between pins 26 and 28 for

phase compensation. Since the TC7129 uses internal

phase compensation, these parts are not required and,

in fact, must be removed from the circuit for stable

operation.

4.2 Powering the TC7129

While the most common power source for the TC7129

is a 9V battery, there are other possibilities. Some of

the more common ones are explained below.

4.2.1 ±5V Power Supply

Measurements are made with respect to power supply

ground. DGND (pin 36) is set internally to about 5V less

than V+(pin 24); it is not intended to be a power supply

input and must not be tied directly to power supply

ground. It can be used asa reference for external logic,

as explained in Section 4.3 “Connecting to External

Logic”, (see Figure 4-1).

Figure 4-1: Powering the TC7129 From

a ±5V Power Supply.

4.2.2 Low Voltage Battery Source

A battery with voltage between 3.8V and 6V can be

used to power the TC7129 when used with a voltage

doubler circuit, as shown in Figure 4-2. The voltage

doubler uses the TC7660 DC-to-DC voltage converter

and two external capacitors.

Figure 4-2: Powering the TC7129 From

a Low-Voltage Battery.

V–

V+

REF HI

REF LO

IN HI

COMMON

IN LO

DGND

VIN

–

-5V

0.1 µF

+5V

0.1 µF

TC7129

0.1 µF

V–

TC7129

V+

REF HI

REF LO

IN HI

COMMON

IN LO

DGND

3.8V

10 µF

–

TC7660

VIN

TC7129

DS21459C-page 10 2004 Microchip Technology Inc.

4.2.3 +5V Power Supply

Measurements are made with respect to power supply

ground. COMMON (pin 28) is connected to REF LO

(pin 35). A voltage doubler is needed, since the supply

voltage is less than the 6V minimum needed by the

TC7129. DGND (pin 36) must be isolated from power

supply ground (see Figure 4-3).

Figure 4-3: Powering the TC7129 From

a +5V Power Supply.

4.3 Connecting to External Logic

External logic can be directly referenced to DGND

(pin 36), provided that thesupplycurrentof the external

logic does not exceed the sink current of DGND

(Figure 4-4). A safe value for DGND sink current is

1.2 mA. If the sink current is expected to exceed this

value, a buffer is recommended (see Figure 4-5).

Figure 4-4: External Logic Referenced

Directly to DGND.

Figure 4-5: External Logic Referenced

to DGND with Buffer.

4.4 Temperature Compensation

For most applications, VDISP (pin 19) can beconnected

directly to DGND (pin 36). For applications with a wide

temperature range, some LCDs require that the drive

levels vary with temperature to maintain good viewing

angle and display contrast. Figure 4-6 shows two

circuits that can be adjusted to give temperature com-

pensation of about 10 mV/°C between V+ (pin 24) and

VDISP. The diode between DGND and VDISP should

have a low turn-on voltage because VDISP cannot

exceed 0.3V below DGND.

V–

V+

DGND

10 µF

–

VIN

TC7660

V+

GND

0.1 µF

+5V

TC7129

External

Logic

DGND

V+

ILOGIC

TC7129

V-

–

External

Logic

ILOGIC

DGND

V+

TC7129

V–

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