MaxLinear XR17V358 Manuel utilisateur

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART

JULY 2018 REV. 1.0.6

GENERAL DESCRIPTION

The XR17V3581 is a single chip 8-channel PCI

Express (PCIe) UART (Universal Asynchronous

Receiver and Transmitter), optimized for higher

performance and lower power. The XR17V358

serves as a single lane PCIe bridge to 8 independent

enhanced 16550 compatible UARTs. The XR17V358

is compliant to PCIe 2.0 Gen 1 (2.5 GT/s).

In addition to the UART channels, the XR17V358 has

16 multi-purpose I/Os (MPIOs), a 16-bit general

purpose counter/timer and a global interrupt status

Each UART of the XR17V358 has many enhanced

features such as the 256-bytes TX and RX FIFOs,

programmable Fractional Baud Rate Generator,

Automatic Hardware or Software Flow Control, Auto

RS-485 Half-Duplex Direction Control, programmable

TX and RX FIFO Trigger Levels, TX and RX FIFO

Level Counters, infrared mode, and data rates up to

31.25 Mbps. The XR17V358 is available in a 176-pin

FPBGA package (13 x 13 mm).

NOTE 1: Covered by U.S. Patents #5,649,122, #6,754,839,

#6,865,626 and #6,947,999

APPLICATIONS

Next generation Point-of-Sale Systems

Remote Access Servers

Storage Network Management

Factory Automation and Process Control

Multi-port RS-232/RS-422/RS-485 Cards

FEATURES

Single 3.3V power supply

Internal buck regulator for 1.2V core

PCIe 2.0 Gen 1 compliant

x1 Link, dual simplex, 2.5 Gbps in each direction

Expansion bus interface

EEPROM interface for configuration

Global interrupt status register for all eight UARTs

Up to 31.25 Mbps serial data rate

16 multi-purpose inputs/outputs (MPIOs)

16-bit general purpose timer/counter

Sleep mode with wake-up Indicator

Eight independent UART channels controlled with

■16550 compatible register Set

■256-byte TX and RX FIFOs

■Programmable TX and RX Trigger Levels

■TX/RX FIFO Level Counters

■Fractional baud rate generator

■Automatic RTS/CTS or DTR/DSR hardware

flow control with programmable hysteresis

■Automatic Xon/Xoff software flow control

■RS-485 half duplex direction control output

with programmable turn-around delay

■Multi-drop with Auto Address Detection

■Infrared (IrDA 1.1) data encoder/decoder

Software compatible to XR17C15x, XR17D15x,

XR17V25x PCI UARTs

FIGURE 1. BLOCK DIAGRAM OF THE XR17V358

Global

Configuration

Registers

Crystal Osc/Buffer

P C I Lo ca l

Bus

Interface

Configuration

Space

Registers

Multi- purpose

Inputs/Outputs

16-bit

Tim er/Counter

UART Channel 0

64- byte TX FIFO

64- byte RX FIFOBRG

ENDEC

TX & RX

UART

Regs

TX+

RX+

EECK

EEDO

EECS

UART Channel 1

UART Channel 2

UART Channel 3

UART Channel 4

UART Channel 5

UART Channel 6

UART Channel 7

TMRCK

RX[7:0]

TX [7:0 ]

RTS#[7:0]

DTR#[7:0]

C T S #[7 :0 ]

D S R # [7 :0]

DCD#[7:0]

M P IO [7 :0 ]

RI#[7:0]

EEPROM

Interface

Global

Configuration

Registers

Global

Configuration

Registers

PCIe

Interface

Configuration

Space

Registers

Multi- purpose

Inputs/Outputs

Multi-purpose

Inputs/Outputs

16-bit

Tim er/Counter

16-bit

Tim er/Counter

UART Channel 0

64- byte TX FIFO

64-BRG

ENDEC

TX & RX

UART

Regs

UART Channel 0

256-byte TX FIFO

BRG

ENDEC

TX & RX

UART

Regs

EEDI

UART Channel 1

UART Channel 2

UART Channel 3

UART Channel 4

UART Channel 5

UART Channel 6

UART Channel 7

TMRCK

RX [7:0]

TX [7:0 ]

RTS#[7:0]

DTR#[7:0]

C T S #[7 :0 ]

D S R # [7 :0]

DCD#[7:0]

M P IO [7 :0 ]MPIO[15:0]

RI#[7:0]

ENIR#

EEPROM

Interface

EEPROM

Interface

256-byte RX FIFO

TX-

RX-

CLK+

CLK-

CLKREQ#

PERST#

EN485#

Expansion

In te rfa c e

D[7:0]

SEL

IN T

MODE

CLK

Buck Regulator

125 M Hz Clock

PRES

FIGURE 2. 176-FPBGA PINOUT

Transparent Top View

A1 Corner

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Transparent Top View

A1 Corner

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

NC TX5 RI4 GND CTS4# TX4 DSR2# GND RTS 2# TMRCK TEST2 GND LX LX NC

CD5# DTR5# CTS5# CD4# DTR4# RX4 CD2# DTR2# RX2 ENIR# TEST1 GND VCC33 VCC33 VCC33

MPIO0 RI5# DSR5# RTS5# DSR4# RTS4# RI2# CTS2# TX2 EN485 # FB GND VCC33 ENABL E D0

MPIO2 MPIO1 RX5 GND VCC33 GND VCC12 GND VCC33 GND VCC12 GND PWRGD INT D2

MPIO5 MPIO4

GND TEST0

RX+ RX-

GND GND

TX+ TX-

GND VCC12

CLKREQ# PERST#

GND MPIO8 MPIO11 MPIO14 TMS GND VCC33 GND VCC12 GND CD7# EEDO RX0 DSR0# GND

MPIO9 MPIO12 MPIO15 TRST# TX3 CTS3# CD3# RI3# DSR6# TX7 CTS7# RI7# TX0 CTS0# DTR0#

MPIO10 MPIO13 TCK TDO RTS3# DTR3# RTS6# RX6 DTR6# Ri6# RX7 DTR7# EECK EEDI RTS0#

NC RESET# TDI GND RX3 DSR3# TX6 GND CTS6# CD6# RTS7# GND DSR7# EECS NC

D3 D4

D6 D7

CLK MODE

PRES GND

DSR1# CD1#

RX1 CTS1#

RI0# TX1

MPIO3 VCC12

MPIO6 GND

GND CLK+

REXT CLK-

GND GND

VCC33 VCC12

MPIO7 GND

VCC33 D1

GND D5

VCC12 SEL

GND RI1#

VCC33 DTR1#

GND RTS1#

VCC12 CD0#

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

NC TX5 RI4 GND CTS4# TX4 DSR2# GND RTS 2# TMRCK TEST2 GND LX LX NC

CD5# DTR5# CTS5# CD4# DTR4# RX4 CD2# DTR2# RX2 ENIR# TEST1 GND VCC33 VCC33 VCC33

MPIO0 RI5# DSR5# RTS5# DSR4# RTS4# RI2# CTS2# TX2 EN485 # FB GND VCC33 ENABL E D0

MPIO2 MPIO1 RX5 GND VCC33 GND VCC12 GND VCC33 GND VCC12 GND PWRGD INT D2

MPIO5 MPIO4

GND TEST0

RX+ RX-

GND GND

TX+ TX-

GND VCC12

CLKREQ# PERST#

GND MPIO8 MPIO11 MPIO14 TMS GND VCC33 GND VCC12 GND CD7# EEDO RX0 DSR0# GND

MPIO9 MPIO12 MPIO15 TRST# TX3 CTS3# CD3# RI3# DSR6# TX7 CTS7# RI7# TX0 CTS0# DTR0#

MPIO10 MPIO13 TCK TDO RTS3# DTR3# RTS6# RX6 DTR6# Ri6# RX7 DTR7# EECK EEDI RTS0#

NC RESET# TDI GND RX3 DSR3# TX6 GND CTS6# CD6# RTS7# GND DSR7# EECS NC

D3 D4

D6 D7

CLK MODE

PRES GND

DSR1# CD1#

RX1 CTS1#

RI0# TX1

MPIO3 VCC12

MPIO6 GND

GND CLK+

REXT CLK-

GND GND

VCC33 VCC12

MPIO7 GND

VCC33 D1

GND D5

VCC12 SEL

GND RI1#

VCC33 DTR1#

GND RTS1#

VCC12 CD0#

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

ORDERING INFORMATION(1)

PART NUMBER OPERATING TEMPERATURE RANGE LEAD-FREE PACKAGE PACKAGING METHOD

XR17V358IB176-F -40°C to +85°C Yes(2) 176-FPBGA Tray

XR17V358/SP339-0A-EB XR17V358 8-Channel Evaluation Board

XR17V358/SP339-E4-EB XR17V358 12-Channel Evaluation Board (Master / Slave)

XR17V358/SP339-E8-EB XR17V358 16-Channel Evaluation Board (Master / Slave)

NOTES:

1. Refer to www.exar.com/XR17V358 for most up-to-date Ordering Information.

2. Visit www.exar.com for additional information on Environmental Rating.

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART REV. 1.0.6

XR17V358

REV. 1.0.6 HIGH PERFORMANCE OCTAL PCI EXPRESS UART

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

PCIe SIGNALS

CLK+

CLK-

PCIe reference clock input. (Nominal single-ended swing from 0 to 700 mV.)

TX+

TX-

PCIe differential TX outputs. Must be AC coupled using 0.1 uF non-polarized

capacitor (0603 or smaller) near the transmitting source.

RX+

RX-

PCIe differential RX inputs. Must be AC coupled using 0.1 uF non-polarized

capacitor (0603 or smaller) near the transmitting source.

CLKREQ# L1 OPCIe edge connector clock request. Optional feature, not supported.

PERST# L2 IPCIe edge connector reset

REXT H3 Connect a 191 ohm 1% resistor to GND. This is used for PCIe PHY 

calibration.

MODEM OR SERIAL I/O INTERFACE

TX0 N13 OUART channel 0 Transmit Data or infrared transmit data.

RX0 M13 IUART channel 0 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted internally prior to

decoding by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is

recommended on this pin.

RTS0# P15 OUART channel 0 Request to Send or general purpose output (active LOW).

CTS0# N14 IUART channel 0 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR0# N15 OUART channel 0 Data Terminal Ready or general purpose output (active

LOW).

DSR0# M14 IUART channel 0 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD0# L13 IUART channel 0 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI0# L14 IUART channel 0 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX1 L15 OUART channel 1 Transmit Data or infrared transmit data.

RX1 K14 IUART channel 1 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS1# K13 OUART channel 1 Request to Send or general purpose output (active LOW).

CTS1# K15 IUART channel 1 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR1# J13 OUART channel 1 Data Terminal Ready or general purpose output (active

LOW).

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART REV. 1.0.6

DSR1# J14 IUART channel 1 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD1# J15 IUART channel 1 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI1# H13 IUART channel 1 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX2 C9 OUART channel 2 Transmit Data or infrared transmit data.

RX2 B9 IUART channel 2 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS2# A9 OUART channel 2 Request to Send or general purpose output (active LOW).

CTS2# C8 IUART channel 2 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR2# B8 OUART channel 2 Data Terminal Ready or general purpose output (active

LOW).

DSR2# A7 IUART channel 2 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD2# B7 IUART channel 2 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI2# C7 IUART channel 2 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX3 N5 OUART channel 3 Transmit Data or infrared transmit data.

RX3 R5 IUART channel 3 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS3# P5 OUART channel 3 Request to Send or general purpose output (active LOW).

CTS3# N6 IUART channel 3 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR3# P6 OUART channel 3 Data Terminal Ready or general purpose output (active

LOW).

DSR3# R6 IUART channel 3 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD3# N7 IUART channel 3 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI3# N8 IUART channel 3 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX4 A6 OUART channel 4 Transmit Data or infrared transmit data.

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

REV. 1.0.6 HIGH PERFORMANCE OCTAL PCI EXPRESS UART

RX4 B6 IUART channel 4 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS4# C6 OUART channel 4 Request to Send or general purpose output (active LOW).

CTS4# A5 IUART channel 4 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR4# B5 OUART channel 4 Data Terminal Ready or general purpose output (active

LOW).

DSR4# C5 IUART channel 4 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD4# B4 IUART channel 4 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI4# A3 IUART channel 4 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX5 A2 OUART channel 5 Transmit Data or infrared transmit data.

RX5 D3 IUART channel 5 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS5# C4 OUART channel 5 Request to Send or general purpose output (active LOW).

CTS5# B3 IUART channel 5 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR5# B2 OUART channel 5 Data Terminal Ready or general purpose output (active

LOW).

DSR5# C3 IUART channel 5 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD5# B1 IUART channel 5 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI5# C2 IUART channel 5 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX6 R7 OUART channel 6 Transmit Data or infrared transmit data.

RX6 P8 IUART channel 6 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS6# P7 OUART channel 6 Request to Send or general purpose output (active LOW).

CTS6# R9 IUART channel 6 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR6# P9 OUART channel 6 Data Terminal Ready or general purpose output (active

LOW).

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART REV. 1.0.6

DSR6# N9 IUART channel 6 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD6# R10 IUART channel 6 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI6# P10 IUART channel 6 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

TX7 N10 OUART channel 7 Transmit Data or infrared transmit data.

RX7 P11 IUART channel 7 Receive Data or infrared receive data. Normal RXD input

idles at HIGH condition. The infrared pulses can be inverted prior to decoding

by setting FCTR bit [4]. If unused, a pull-up or pull-down resistor is 

recommended on this pin.

RTS7# R11 OUART channel 7 Request to Send or general purpose output (active LOW).

CTS7# N11 IUART channel 7 Clear to Send or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

DTR7# P12 OUART channel 7 Data Terminal Ready or general purpose output (active

LOW).

DSR7# R13 IUART channel 7 Data Set Ready or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

CD7# M11 IUART channel 7 Carrier Detect or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

RI7# N12 IUART channel 7 Ring Indicator or general purpose input (active LOW). If

unused, a pull-up or pull-down resistor is recommended on this pin.

EXPANSION INTERFACE

MODE G15 IExpansion Interface Mode Select. Connect this pin to VCC to enable master

mode. Connect this pin to GND to enable slave mode.

CLK G14 I/O Expansion Interface Clock. In master mode, this pin is the clock output to the

slave device. In slave mode, this pin is the clock input from the master

device. The expansion interface clock is 62.5 MHz. The UARTs on the slave

device will need to use different baud rate generator divisors than the master

device. The trace capacitance between the master and slave device must be

less than 25pF.

D7 F15 I/O Expansion Interface Data 7 (MSB) with internal pull-down resistor. If a slave

device is present, connect between master and slave with trace capacitance

of less than 25 pF. Leave unconnected if no slave device is present.

D6 F14 I/O Expansion Interface Data 6 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

D5 F13 I/O Expansion Interface Data 5 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

D4 E15 I/O Expansion Interface Data 4 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

REV. 1.0.6 HIGH PERFORMANCE OCTAL PCI EXPRESS UART

D3 E14 I/O Expansion Interface Data 3 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

D2 D15 I/O Expansion Interface Data 2 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

D1 E13 I/O Expansion Interface Data 1 with internal pull-down resistor. If a slave device

is present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

D0 C15 I/O Expansion Interface Data 0 (LSB) with internal pull-down resistor. If a slave

device is present, connect between master and slave with trace capacitance

of less than 25 pF. Leave unconnected if no slave device is present.

SEL G13 I/O Expansion Interface Read/Write Select. This is the the read/write select input

in the slave mode. This is the read/write select output in the master mode.

This pin has an internal pull-down resistor and can be left unconnected if

there is no slave device. The trace capacitance between the master and

slave device must be less than 25pF.

INT D14 I/O Expansion Interface Interrupt. This is the expansion interface interrupt output

in the slave mode. This is the expansion interface interrupt input in the 

master mode. This pin has an internal pull-down resistor. If a slave device is

present, connect between master and slave with trace capacitance of less

than 25 pF. Leave unconnected if no slave device is present.

PRES H14 ISlave Present, has internal pull-down resistor. In master mode, pull this pin to

VCC to check if a slave is device present. Connect this pin to GND or leave

unconnected if there is no slave device or to disable checking for a slave

device.

MPIO SIGNALS

MPIO0 C1 I/O Multi-purpose input/output 0. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO1 D2 I/O Multi-purpose input/output 1. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO2 D1 I/O Multi-purpose input/output 2. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO3 E3 I/O Multi-purpose input/output 3. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO4 E2 I/O Multi-purpose input/output 4. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART REV. 1.0.6

MPIO5 E1 I/O Multi-purpose input/output 5. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO6 F3 I/O Multi-purpose input/output 6. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO7 L3 I/O Multi-purpose input/output 7. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO8 M2 I/O Multi-purpose input/output 8. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO9 N1 I/O Multi-purpose input/output 9. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO10 P1 I/O Multi-purpose input/output 10. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO11 M3 I/O Multi-purpose input/output 11. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO12 N2 I/O Multi-purpose input/output 12. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO13 P2 I/O Multi-purpose input/output 13. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO14 M4 I/O Multi-purpose input/output 14. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

MPIO15 N3 I/O Multi-purpose input/output 15. This pin defaults to an input with interrupts 

disabled and is controlled using the MPIOSEL, MPIOLVL, MPIOINV, MPIO3T,

MPIOOD and MPIOINT configuration registers. If unused, a pull-up or pull-

down resistor is recommended on this pin.

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

REV. 1.0.6 HIGH PERFORMANCE OCTAL PCI EXPRESS UART

EEPROM SIGNALS

EECK P13 I/O Serial clock output uses the internal 125 MHz clock divided by 256 (488 KHz)

following power-up or reset to read an external EEPROM. This pin may also

be manually clocked using the Configuration Register REGB.

EECS R14 I/O Active high chip select output to an external EEPROM with internal weak pull-

down resistor. Connect an external 4.7K ohm pull-up resistor to this pin to

enable reading of an external EEPROM. This pin may also be manually

enabled using the Configuration Register REGB.

EEDI P14 OWrite data to EEPROM device. It is manually accessible thru the 

Configuration Register REGB.

EEDO M12 IRead data from EEPROM device with internal pull-down resistor. It is 

manually accessible thru the Configuration Register REGB.

JTAG SIGNALS

TRST# N4 IJTAG Test Reset. This signal is active LOW with internal pull-up resistor.

TCK P3 IJTAG Test Clock

TMS M5 IJTAG Test Mode Select with internal pull-up resistor

TDI R3 IJTAG Data Input with internal pull-up resistor

TDO P4 OJTAG Data Output

BUCK REGULATOR SIGNALS

ENABLE C14 ILogic ’1’ enables, logic ’0’ disables buck regulator output.

A13

A14

Output of internal buck regulator. Use 4.7 uH inductor and connect to FB pin

as shown in Figure 3.

FB C11 IBuck regulator feedback. Decouple with 47uF capacitor and connect to LX

pins through 4.7 uH inductor as shown in Figure 3.

PWRGD D13 OAsserted when the 1.2V internal buck voltage is powered up and within 

regulation.

ANCILLARY SIGNALS

RESET# R2 ISystem reset (active low). In normal operation, this signal should be HIGH.

TMRCK A10 I16-bit timer/counter external clock input.

EN485# C10 IAuto RS-485 mode enable (active low). This pin is sampled during power up,

following a hardware reset (RST#) or soft reset (register RESET). It can be

used to start up all 8 UARTs in the Auto RS-485 Half-Duplex Direction control

mode. The sampled logic state is transferred to FCTR bit-5 in the UART

channel.

ENIR# B10 IInfrared mode enable (active low). This pin is sampled during power up, 

following a hardware reset (RST#) or soft-reset (register RESET). It can be

used to start up all 8 UARTs in the infrared mode. The sampled logic state is

transferred to MCR bit-6 in the UART.

PIN DESCRIPTIONS

NAME PIN # TYPE DESCRIPTION

XR17V358

HIGH PERFORMANCE OCTAL PCI EXPRESS UART REV. 1.0.6

NOTE: Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain, OT=Output Tristate,



IS=Input Schmitt Trigger.

TEST0

TEST1

TEST2

B11

A11

Factory Test Modes. For normal operation, connect to GND.

POWER / GROUND / NO CONNECT

VCC33 D5, D9, E12,

J12, M7

Pwr 3.3V I/O power supply.

VCC33A K3 Pwr 3.3V analog PHY power supply. A ferrite bead is recommended on this pin.

VCC33P B13, C13 Pwr 3.3V power supply voltage for output stage of buck regulator.

VCC33B B14, B15 Pwr 3.3V power supply for the analog blocks of the buck regulator.

VCC12 D7, D11, E4,

G12, K4, L12,

Pwr 1.2V core power supply. A ferrite bead is recommended on these pins.

VCC12A K2 Pwr 1.2V analog PHY power supply. A ferrite bead is recommended on this pin.

GND A4, A8, A12,

B12, C12, D4,

D6, D8, D10,

D12, F1, F4,

F12, G3, H1,

H2, H12, H15,

J3, J4, K1, K12,

L4, M1, M6,

M8, M10, M15,

R4, R8, R12

Pwr Power supply common, ground.

NC A1, A15, R1,

R15

-No internal connection.

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NAME PIN # TYPE DESCRIPTION

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