Infineon TLE4997 Manuel utilisateur

Sense & Control

User’s Manual

v01_01, 2019-08

TLE4997

Configuration and Calibration of Linear Hall Sensor

Edition 2019-08

Published by

Infineon Technologies AG

81726 Munich, Germany

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in

question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written

approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure

of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

TLE4997

User’s Manual

Table of Contents

User’s Manual 3 v01_01, 2019-08

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 TLE4997 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 TLE4997 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 Programmer Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.2.1 Communication Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.3 Command Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.3.1 Data Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.3.2 Interface Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.4 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.5 EEPROM Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.6 Programming Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.6.1 Setting the TEST register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.6.2 Readout of the EEPROM Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.6.3 Setting the EEPROM Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.6.4 Calculation of Bits to Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.6.5 Calculation of Bits to Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.6.6 Margin Voltage Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6.7 DATA access example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6.8 Temporary overwrite of EEPROM data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.6.9 DAC setup example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4 Configuration & Calibration Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 Magnetic Field Range - R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.2 Gain Setting - G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.3 Offset Setting - OS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.4 Low-Pass Filter - LP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.5 DAC Input Interpolation Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.6 Clamping - CH, CL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.7 Temperature Compensation - TL, TQ & TT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

5 Calibration of TLE4997 Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.1 Integrated Temperature Polynomial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2 Application Sensitivity Polynomial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.3 Determination of Sensitivity Polynomial from Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.4 Calculation of Final Temperature Compensation Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.4.1 Algorithm for Finding the Optimum Temperature Coefficient Set . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.4.2 Example Implementation Code for Temperature Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.5 Usage of Infineon’s Temperature Calibration Tool . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6 Calibration of TLE4997 Output Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.1 Two-Point Calibration Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

6.2 Two-Point Calibration Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.2.1 Calibration with Application Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.2.2 Calibration without Application Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table of Contents

TLE4997

User’s Manual

Scope

User’s Manual 4 v01_01, 2019-08

1Scope

This document is valid for all TLE4997 variants and derivates. It gives a detailed description of the configuration

and calibration procedure, which is recommended to configure the TLE4997 for optimum accuracy in a sensing

application.

2 TLE4997 Signal Processing

The TLE4997 uses a fully digital signal processing concept. Analog values from the Hall probe are directly

converted to raw digital signals by the Hall ADC and then compensated and processed in the digital signal

processing unit (DSP) using configuration parameters stored in the EEPROM and the temperature data acquired

by an integrated temperature sensor. A configurable second-order temperature polynomial is implemented to

compensate the thermal reduction of the remanent magnetic flux of a permanent magnet used in a position

sensing application. Additionally, an application-specific output characteristic can be set by configuring the

EEPROM parameters of Gain and Offset.

Figure 2-1 Signal Flow Diagram of the TLE4997

Figure 2-1 shows the signal flow diagram for temperature compensation and output characteristic in the DSP, and

the influence of the relevant configuration parameters stored in the EEPROM. The Hall signal is processed in the

following sequence of steps:

1. The analog Hall signal is converted by the Hall ADC, which operates at the configured magnetic range setting.

2. The digital value is filtered by a digital low-pass filter, which operates at a configurable filter frequency given

by the “LP filter”-setting. The output of the filter is stored in the HADC register.

3. The HADC value is multiplied by the temperature compensation polynomial and stored in the HCAL register.

The first order (TL) and second order (TQ) coefficients of the polynomial are configurable. The third order

coefficient (TT) is fixed.

4. The HCAL value is multiplied by the configured gain value.

5. The configured offset value is added to the HCAL value.

6. The digital Hall value is clamped according to the configured upper and lower clamping limits. The output value

of the clamping stage is converted from digital to analog.

7. An output voltage is transmitted on the OUT pin and is proportional to the supply voltage (ratiometric DAC).

Stored in

EEPROM

Memory

Hall

Sensor

Limiter

(Clamp)

Out

Range LP

Offset

Gain

Clamping Low

Clamping High

TADC TCAL

Temperature

Sensor

Norm-

alize T-Polynomial

HADC

HCAL

VOUT

VDAC

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User’s Manual

TLE4997 Programming

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3 TLE4997 Programming

3.1 Programmer Connection

Figure 3-1 shows the connection of the TLE4997 to a programmer. The pins VDD and OUT of the sensor IC are

used for the digital programming interface as described in Table 3-1 (See datasheet of corresponding TLE4997

type for pinout).

Figure 3-1 Connection of TLE4997 to Programmer

Table 3-1 Pin Functions for Programming Interface

Pin Programming Function

VDD Programming interface clock

GND Ground

OUT Programming interface data I/O

optional

VDD

I/O 1

I/O2

GND

47nF

PROGRAMMER

TLE

4997x

out

GND

TLE

4997x

out

GND

application module

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User’s Manual

TLE4997 Programming

User’s Manual 6 v01_01, 2019-08

3.2 Programming Interface

3.2.1 Communication Scheme

The digital programming interface uses specific frames, which can have one of the two following functions:

• Command frames contain a specific task (e.g. read/write data, select EEPROM programming etc.) and a

corresponding address

• Data frames contain a 16 bit data value sent to or received from the device - these frames can only follow a

proper command frame for reading or writing data

A valid frame has the following properties:

• A frame consists of 21 bits in total

• A bit is shifted in or out via the output line with a rising clock edge on the supply line

• A frame always starts and ends with a '1' (frame bits)

• The LSB of a frame transmitted to the sensor is shifted in first

• The LSB of a frame replied by the sensor is shifted out first

• The whole frame sent to the device, including frame bits, is protected with an even positional and an odd

positional parity bit

The first frame sent has to be a valid command to activate the interface mode and it has to be sent within 19ms

after power up. As an additional protection, the device does not deactivate its output stage during this transmission

(using 21 clock pulses) as shown in Figure 3-2. This means that the interface driver of the programmer needs to

overrule the open drain output stage of the sensor during this initial transmission.

Figure 3-2 First Frame Transmission to the Sensor

Attention: Overruling Vout requires a strong driver on the programmer, since the OUT line must be driven

to low levels close to GND for any “0”-bit and close to VDD for any “1”-bit in order to ensure a

proper communication with the sensor.

After the first frame, to avoid additional power consumption in the output stage of the device, the internal driver is

deactivated in programming mode while the sensor is receiving a frame. It is activated again after completion of

the transmission. This is illustrated in Figure 3-3.

Figure 3-3 Further Frame Transmisson from the Programmer to the Sensor (Write Access)

VDD

Vout

LSB MSB

during first transmission , the output stage is still switched on

power up interface

activated

internal buffer on

VDD

Vout

LSB MSB

during transmission the buffer is switched off internal buffer on

interface

active

interface

active

protocol

output

leading driver

off pulse

protocol

output

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TLE4997 Programming

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In case of a wrong command or data frame, the interface is immediately locked and the device falls back to its

normal application mode. The read access to the device is triggered by clock pulses on the supply line as shown

in Figure 3-4. The timing of read and write accesses is described in Chapter 3.3.2.

Figure 3-4 Frame Transmisson from the Sensor to the Programmer (Read Access)

3.3 Command Frame

The structure of a command frame is shown in Figure 3-5. Available commands are given in Table 3-2. The parity

bits PE (bit 17) and PO (bit 18) have to be set in the follwing way (bit 0 is the LSB, bit 20 is the MSB):

bit0 XOR bit2 XOR bit4 XOR …. XOR bit20 = 0

bit1 XOR bit3 XOR bit5 XOR …. XOR bit19 = 0

Figure 3-5 Command Frame Structure

Table 3-2 List of Available Commands

Command Bits (MSB...LSB) Function

0H000000 Leave programming mode1)

1) not to be followed by any data frame

1H000001 Single data readout from given address without increment (sensor

response: one data frame)

3H000011 Data readout from given address with increment (readout finishes

when address “xxx111B” is reached)

9H001001 Single data write to given address without increment (followed by

one data frame)

BH001011 Data write to given address with increment (followed by multiple data

frames; finishes at address “xxx111B” or by sending another

command frame)

CH001100 Enable EEPROM write mode (programs “1”-bits)1)2)

2) followed by application of a programming pulse

DH001101 Enable EEPROM erase mode (programs “0”-bits)1)2)

EH001110 Enable EEPROM margin check mode (programs level check)1)3)

3) followed by application of a margin voltage level before the last clock pulse falling edge

FH001111 EEPROM refresh (update EEPROM registers)1)

VDD

Vout

LSB MSB

digital data readout, buffer in I /O mode

internal buffer on internal buffer on

tailing driver on

pulse

1 1 P

E0 0 ADDR (6bit) 1 0 CMD (6bit) 1

MSB (bit 20) LSB (bit 0)

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User’s Manual

TLE4997 Programming

User’s Manual 8 v01_01, 2019-08

3.3.1 Data Frame

The structure of a data frame sent to the device is shown in Figure 3-6. The parity bits PE (bit 17) and PO (bit 18)

have to be set in the same way as for the command frame (bit 0 is the LSB, bit 20 is the MSB):

bit0 XOR bit2 XOR bit4 XOR …. XOR bit20 = 0

bit1 XOR bit3 XOR bit5 XOR …. XOR bit19 = 0

Figure 3-6 Data Frame to Sensor

Figure 3-7 shows a the structure data frame received from the sensor. Instead of a zero bit followed by two parity

bits, the least significant 3 bits of the address used for the readout are transmitted together with the data. This is

to check the plausibility of the received data.

Figure 3-7 Data Frame from Sensor

3.3.2 Interface Specification

Table 3-3 specifies the operating conditions of the programming interface, which must be met in order to ensure

correct operation of the TLE4997 during programming. All specified parameters refer to these operating

conditions, unless otherwise noted.

The specification for timings and electrical levels of the programming interface is shown in Table 3-4. The meaning

of the timing parameters is illustrated in Figure 3-8.

Table 3-3 Operating Range of the Programming Interface

Parameter Symbol Values Unit Note / Test Condition

Min. Typ. Max.

Supply voltage VDD 4.5 – 5.5 V –

Supply buffer capacitance CS47 – 1000 nF VDD to GND

Load capacitance CL0.01)

1) >47nF soldered to the device required in case that connectivity failures can influence the programming voltage.

– 210 nF OUT to GND

Ambient temperature TPRG 10 – 60 °C during programming

Number of programming

cycles

NPRG 10 Cycles Programming is allowed only at

start of lifetime

Programming time tPRG – 100 – ms For complete memory

Programming start time tPRG_START – – 19 ms To start programming mode, a

first read command shall be sent

within this time window after

power-up

1 0 P

EDATA (16bit) 1

MSB (bit 20) LSB (bit 0)

1ADR (3 LSBs) DATA (16bit) 1

MSB (bit 20) LSB (bit 0)

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Figure 3-8 Frame Timing

Table 3-4 Electrical and Timing Specification of the Programming Interface

Parameter Symbol Values Unit Note / Test Condition

Min. Typ. Max.

VDD clock high level VDD,CLKHI 8.8 9.4 10 V specification of VDD operating

range does not apply to clock

VDD clock low level VDD,CLKLOW 4.8 5 5.2 V

OUT data out high level VO,OHIGH VDD - 2 – VDD,CLKHI V OUT follows VDD if ‘high’

OUT data out low level VO,OLOW 0–2.0 V

OUT data in high level VO,IHIGH 3.0 VDD VDD + 0.1 V

OUT data in low level VO,ILOW -0.2 0.0 0.1 V

OUT data input current IO-50 – 50 mA 1)

1) capacity of external driver, especially during initial interface access (to overwrite ratiometric device output).

VDD clock high time tCH 2.4 50 100 µs 5k...250kBit/s

VDD clock low time tCL 1.6 4.0 100 µs 5k...250kBit/s

Data in setup time tSU 1.5 2.0 – µs to rising VDD

Data in hold time tHLD 2.3 3.0 – µs after rising VDD

Data out settling time tSET – 1.0 1.7 µs after rising VDD

Time between frames tMIN 10.0 – – µs

Buffer off delay tDEL 10.0 25.0 – µs 2)

2) to reduce collisions with the ext. driver, it must be switched on slower than tDEL min. and switched off faster than tHLM max.;

charge/discharge behaviour on VOUT depends also on capacitive output load.

Buffer on delay tHLM – 5.0 10.0 µs 2)3)

3) to reach again a valid and stable ratiometric VOUT signal state, please check the power-on time in the data sheet.

VDD

Vout

LSB MSB

tcl

tch

tsu thldtdel thlm

LSB

tset tset

tmin

init

frame

data read

frame

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In order to permanently store a programmed parameter set to the EEPROM, the “EEPROM erase” and “EEPROM

write” commands shall be sent, followed by a programming pulse. Figure 3-9 shows the timing of the programming

pulse.

Figure 3-9 Programming Pulse Timing

After programming, a margin check is necessary to test the stability of the programmed data. The margin check

is initiated by an “EEPROM margin check” command followed by a margin voltage.

Figure 3-10 Margin Check Timing

The margin voltage is varied during subsequent steps within the threshold margin level range. A too low margin

voltage value indicates a too short programming pulse duration or a too low programming voltage. A too high

margin voltage value indicates a too long programming pulse duration or a too high programming voltage.

Table 3-5 gives the electrical and timing specifications of the programming pulse and the margin voltage check

procedure.

Table 3-5 Electrical and Timing Specification of the Programming Pulse and Margin Voltage

Parameter Symbol Values Unit Note / Test Condition

Min. Typ. Max.

OUT data input current IO0 – 20 mA during application of

programming pulse or margin

voltage

OUT margin level VO,MARG -0.1 – 7 V

Threshold margin level VTH 2.23 – 4.5

0.4

check “1”

check “0”

Margin setup time tMARG 200 – – µs

VDD slope for margin VDD/t 5 10 150 V/µs

OUT program level VO,PROG 19.2 19.3 19.4 V

VDD

Vout

MSB

HLD

LSB

MIN

next command

frame

MIN

erase or write

command frame

(buffer stays off)

prog

pulse

O,PROG

(rise)

O,PROG

(fall)

PROG,WR

or t

PROG,ER

HLD

VDD

Vout

MSB LSB

MARG

next command

frame

min

margin

command frame

(buffer stays off)

(fall)

hld

apply V

O,MARG

and

capture EEPROM data

min

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