GE VAT2000 Series Manuel utilisateur

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GE Power Controls

PCST-3303E-R0

VAT2000 AC Drive Series

U2KV23PI0

Parallel Interface

INSTRUCTION MANUAL

NOTICE

1. Read both this manual and VAT2000 Instruction

Manual (PCST-3251) before using the

U2KV23PI0, and store in a safe place for

reference.

2. Observe the warnings, cautions and other matters

described in this manual.

3. Make sure that this manual is delivered to the final

user.

GE Power Controls

Contents

1. Specifications and Configuration....................................................................... 1

2. Installation Into Inverter ...................................................................................... 2

3. Parallel Data Input................................................................................................ 4

3-1. Connection and setting procedure.................................................................. 4

3-2. Data input mode selection and signal specifications....................................... 5

3-3. Signal logic and circuit format selection.......................................................... 7

4. Usage of PSO Terminal Function........................................................................ 8

Appendix Table 1 CN1 pin layout ............................................................................... 9

Appendix Table 2 TB1 terminal functions.................................................................. 9

Appendix Table 3 Hardware Option Function Setting ............................................ 10

1. Specifications and Configuration

- 1 -

1. Specifications and Configuration

Table 1-1 U2KV23PI0 specifications

Item Specifications

Parallel input section

Frequency setting/Speed setting

resolution Min. 0.01Hz (0.1rpm)

Data format Select from a total of eleven types including

binary/BCD, 8/16 bits

Synchronization method Select from synchronous method with strobe signal or

asynchronous method with sample

Data width Select from 16-bit non-multiplexed or 8-bit multiplexed

Circuit voltage/current 24VDC/5mA (tolerable leakage current 0.5mA)

Interface power 24V±10%, 0.2A or higher capacity to be provided by

the user.

Open collector output section

No. of points 2 points (PSO4, 5)

Max. voltage/current 30VDC/50mA

Control PCB

Parallel data

input section

Open collector

output section

TB1

CN1

V23-PI0 Option PCB

External power

supply for parallel

input

Fig. 1-1 Configuration

2. Installation Into Inverter

- 2 -

2. Installation Into Inverter

The installation procedure and points of caution are as described below.

(1)Remove the inverter unit's front cover.

CAUTION

1. Wait at least 20 minutes after turning the power OFF before starting work. Make sure that the

displays on the operation panel have gone out before removing the cover.

2. After removing the cover, confirm that the “CHARGE” LED on the unit has gone out.

Also check that the voltage between terminals L+1 or L+2 and L- is 15V or less before starting

the inspections.

(Check with the “CHARGE” LED if the unit is not provided with the L- terminal.)

(2)If the other option PCB is installed onto the position for option II on the control PCB cover,

install this PCB onto the position for option III.

Refer to Fig. 2-1.

(3)When wiring to TB1 use AWG26 to 16 (0.14 to 1.5mm2) for the wires.

Wires should be terminated correctly, with suitable crimp terminals or ferrules.

Pass the wires through the cable connection hole on the inverter unit and then connect.

CAUTION

1. Observe the cautions listed in Fig. 3-1 and Section 2-4 in the VAT2000 Instruction Manual

(PCST-3251) when wiring.

2. Installation Into Inverter

- 3 -

Option cover

Option

III

Control PCB cover

Option

The mounting position

of V23-PI0

Fig. 2-1 Installation of optional PCB

NPSF - ST19 -

MEIDEN

N62P30449 1/5A MADE IN JAPAN

TB1

SOURCE

SINK1

CP1

CN1

Fig. 2-2 Optional PCB

3. Parallel Data Input

- 4 -

3. Parallel Data Input

3-1. Connection and setting procedure

(1) Connection

The parallel data input connection is shown in Fig. 3-1.

The parallel data is input from CN1. CN1 is a DDK FRC2-C26L11-0L.

The flat cable (FRC2-AA26-10S) must be provided by the user.

CAUTION

1. The cable length must be 30m or less.

2. The external power can be supplied from the flat cable; but if the cable length is 2m or more,

supply the power from TB1.

The wires that can be used for TB1 are AWG26 to 16 (0.14 to 1.5mm2).

If the flat cable cannot be passed through the inverter unit's cable connection hole, remove the

plate of the cable connection hole.

In this case, the protective structure will be IP00.

CN125 1

26 2

Max. 30m

26-core

flat cable

Sequencer or digital switch

Parallel data

input short pin

TB1

24V power

supply

EX0

EX24

Note) The 24V power supply is to be provided by the user

Fig. 3-1 Connection of parallel data input section

(2)Setting procedure

1) Decide the circuit format and data format.

2) Decide the circuit format (open collector/open emitter) with W1. (Fig. 3-5).

3) Turn ON the power, Set the parameter C02-0 to 2 (parallel fixed). (Refer to Fig. 5-9 in the

VAT2000 Instruction Manual (PCST-3251).)

4) Set the data input mode, circuit format, and parallel data format in C32-0 to C32-2.

Note) Set the A05-2 setting value to 1 to cancel the hardware option display skip when setting

the C32-0 to C32-2 parameters.

(The default value is display skip.)

3. Parallel Data Input

- 5 -

3-2. Data input mode selection and signal specifications

The following three methods can be used for the parallel input data input method.

1) 16-bit with strobe

2) 8-bit multiplexed with strobe

3) 16-bit sample

These methods are selected with parameter No. C32-0.

(1) 16-bit with strobe (C32-0 = 1)

The 16-bit data (D0 to 15) is loaded with the rising edge of the strobe (STB).

D0~D15

STB OFF

Data 0 Data 1 Data 2

ts th

tcy

Data 0 Data 1

tds

Internal data

Fig. 3-2 16-bit with strobe time chart

(2) 8-bit multiplexed with strobe (C32-0 = 2)

The 16-bit data is divided into the low-order 8-bit and high-order 8-bit with the LSB signal, and

each is loaded with the rising edge of the strobe (STB).

D0~D7

STB OFF

Data 0 (high-order) Data 1 (low-order) Data 2 (high-order)

ts th

tcy

Data 0 Data 1

tds

Internal data

LSB OFF

Fig. 3-3 8-bit multiplexed with strobe time chart

3. Parallel Data Input

- 6 -

(3) 16-bit sample (C32-0 = 3)

The 16-bit data is sampled every 10mS, and is loaded when the data for four samples match.

tda

Data 0 Data 1

Data 0 Data 1 Data 2 Data 3

1234123412121

tsp

Note)

Data 2 and 3 are not loaded

in this case.

Fig. 3-4 Sample mode time chart

(4) Timing specifications

Table 3-1

Symbol Name Specifications

t cy Cycle time • 25mS

t w STB pulse width • 3mS

t s Data setup time • 2mS

t h Data hold time • 2mS

t ds Strobe delay 15 ~ 25mS

t da Sample mode delay 50 ~ 60mS

t sp Internal sample time 10 ± 2mS

3. Parallel Data Input

- 7 -

3-3. Signal logic and circuit format selection

(1) Signal logic selection (D0 ~ D15)

Dn = 1 when the contact connected to D0 to D15 is ON (closed circuit), or Dn = 1 when the

contact is OFF (open circuit) can be selected with parameter No. C32-1. (Appendix Table 3)

(2)Signal common selection (W1)

Setting of all signal commons to EX0 or EX24 can be selected with the W1 setting.

The sequence output method open collector and open emitter can both be corresponded to with

this.

V23-PI0

W1 EX0

EX24

D0~D15

TB1-2

TB1-1

STB,LSB

Controller such as sequencer

Open collector output

Open emitter output

External

24V power supply

5 K

Fig. 3-5 Short pin W1 setting

4. Usage of PSO Terminal Function

- 8 -

4. Usage of PSO Terminal Function

When using the U2KV23PI0 PSO4, 5 terminals, set parameter C33-0, 1 sequence output signal.

(Appendix Table 3)

Refer to Table 5-4 in the VAT2000 Instruction Manual (PCST-3251) for details on the sequence

output signal functions.

Table 4-1 PSO terminal settings

Sequence output signal

default values

Terminal Parameter No. setting data output signal

PSO4A-PSO4B-PSO4C C33-0 5 LCL

PSO5A-PSO5B-PSO5C C33-1 6 REV

The sequence output (PSO4, 5) terminals are laid out in CN1. (Appendix Table 1)

CN1-21

CN1-24

CN1-25,26

Load

max. 50mA max. 30V

PSO4

PSO5

V23-PI0

CN1-22,23

Fig. 4-1 PSO terminal connection

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