EWA CORELIS PXIE-1149.1/4E Manuel utilisateur

PXIE-1149.1/4E

High-Speed PXIE

Boundary-Scan Controller

User’s Manual

Corelis, Inc.

13100 Alondra Blvd. Suite 102

Cerritos, CA 90703-2262

Telephone: (562) 926-6727 • Fax: (562) 404-6196

Preface

PRINTING HISTORY

Updated versions of this manual represent the text has been modified and are dated at the time of

the most recently published version of this document.

The date of this manual also references the most recent version of the software product at the time

the manual was published, or update or product update was issued. Many product updates and fixes

do not require manual changes and, conversely, manual corrections may occur without

accompanying product changes.

Edition 1, September 2019

GENERAL NOTICE

Information contained in this document is subject to change without notice. CORELIS shall not be

liable for errors contained herein for incidental or consequential damages in connection with the

furnishing, performance, or use of material contained in this manual.

No part of this document may be reproduced or translated to other languages without the prior

written consent of CORELIS. This manual is a CORELIS proprietary document and may not be

transferred to another party without the prior written permission of CORELIS.

CORELIS assumes no responsibility for the use of or reliability of its software on equipment that is

not furnished by CORELIS.

ENVIRONMENTAL NOTICE

This product must be disposed of in accordance with the WEEE directive.

TRADEMARK NOTICE

Pentium is a registered trademark of Intel Corporation.

Windows is a registered trademark of Microsoft Corporation.

I2C Bus is a registered trademark of Philips Electronics N.V.

Other products and services named in this book are trademarks or registered trademarks of their

respective companies. All trademarks and registered trademarks in this book are the property of

their respective holders.

PRODUCT WARRANTY

For product warranty and software maintenance information, see the PRODUCT WARRANTY

AND SOFTWARE MAINTENANCE POLICY statement included with your product shipment.

EXCLUSIVE REMEDIES

THE REMEDIES CONTAINED HEREIN ARE THE CUSTOMER'S SOLE AND

EXCLUSIVE REMEDIES. CORELIS SHALL NOT BE LIABLE FOR ANY DIRECT,

INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER

BASED ON CONTRACT, TORT, OR ANY OTHER LEGAL THEORY.

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products. For assistance, contact your nearest Corelis Sales and Service Office.

RETURN POLICY

No items returned to CORELIS for warranty, service, or any other reason shall be accepted unless

first authorized by CORELIS, either directly or through its authorized sales representatives. All

returned items must be shipped pre-paid and clearly display a Returned Merchandise Authorization

(RMA) number on the shipping carton. Freight-collect items will NOT be accepted. Customers or

authorized sales representatives must first contact CORELIS with notice of request for return of

merchandise. RMA's can only originate from CORELIS. If authorization is granted, an RMA

number will be forwarded to the customer either directly or through its authorized sales

representative.

CONTACT INFORMATION

For sales inquiries, please contact [email protected].

For any support related questions, please enter a support request at www.corelis.com/support or

email [email protected].

For more information about other products and services that Corelis offers, please visit

www.corelis.com.

iii

Table of Contents

Chapter 1: Product Overview.....................................................................................................1

Introduction ..................................................................................................................................................... 1

What is IEEE Standard 1149.1? ........................................................................................................................ 2

Features of the PXIE-1149.1/4E....................................................................................................................... 2

Adjustable Voltage Levels............................................................................................................................................................ 3

Discrete Input/Output Signals ................................................................................................................................................... 3

PXIE Interface .............................................................................................................................................................................. 3

Programmable Clocks................................................................................................................................................................... 3

Controllable Slew Rate ................................................................................................................................................................. 4

Software Pin Configuration......................................................................................................................................................... 4

Pin Protection ................................................................................................................................................................................ 4

PXIE-1149.1/4E Hardware Specifications ....................................................................................................... 5

Physical............................................................................................................................................................................................ 5

Operating Environment............................................................................................................................................................... 5

Storage Environment.................................................................................................................................................................... 5

Host Interface ................................................................................................................................................................................ 5

Power Requirements..................................................................................................................................................................... 5

PXIE-1149.1/4E Electrical Specifications ........................................................................................................ 6

JTAG TAP Interface .................................................................................................................................................................... 6

Chapter 2: PXIE-1149.1/4E Installation....................................................................................7

Software Must Be Installed. ............................................................................................................................. 7

PXIE-1149.1/4E Hardware Installation ........................................................................................................... 7

Installation Steps ........................................................................................................................................................................... 7

Chapter 3: Connecting to the Target....................................................................................... 11

Connecting to the Target ................................................................................................................................11

Connecting the TAP Signals ...........................................................................................................................13

Chapter 4: Using the PXIE-1149.1/4E with ScanExpress....................................................... 15

Hardware Setup...............................................................................................................................................15

Using PXIE-1149.1/4E with ScanExpress Tools.............................................................................................15

Chapter 5: Third Party Application Interface ......................................................................... 17

Using the PXIE-1149.1/4E with the ScanExpress Runner Command-line.....................................................17

Appendix A: Recommended Target Connectors ....................................................................23

10-pin TAP Connector.................................................................................................................................... 23

Flash Programming TAP Connector ............................................................................................................. 26

20-pin TAP Connector.................................................................................................................................... 29

Appendix B: Self-Test Utility Software ...................................................................................33

Self-Test ......................................................................................................................................................... 33

List of Figures

Figure 1-1. PXIE-1149.1/4E Boundary-scan Controller ..........................................................................1

Figure 1-2. Minimal Test Access Port..........................................................................................................2

Figure 2-1. Found New Hardware Wizard..................................................................................................8

Figure 2-2. Found New Hardware Wizard..................................................................................................9

Figure 2-3. Installation Successfully Completed.........................................................................................9

Figure 2-4. Windows Device Manager.......................................................................................................10

Figure 3-1. PXIE-1149.1/4E 80-pin TAP Connectors...........................................................................11

Figure 4-1. Controller Configuration Screen.............................................................................................15

Figure 4-2. PXIE-1149.1/4E Setup Screen ..............................................................................................16

Figure A-1. Standard TAP connector (top view)......................................................................................23

Figure A-2. TAP Connector Schematic.....................................................................................................25

Figure A-3. Boundary-scan Flash Programming 16 Pin TAP Connector (top view) .........................26

Figure A-4. Flash Programming TAP Connector Schematics ...............................................................28

Figure A-5. Boundary-scan Flash Programming 20-Pin TAP Connector (top view).........................29

Figure A-6. 20-pin TAP Connector Schematic for JTAG .......................................................................31

Figure B-1. Self-Test Results for the PXIE-1149.1/4E..........................................................................33

List of Tables

Table 1-1. Programmable TCK Frequencies ...............................................................................................3

Table 1-2. PXIE-1149.1/4E DC and Switching Characteristics ..............................................................6

Table 3-1. JTAG Connector Pin Assignments (Default) ........................................................................13

Table 3-2. I2C/SPI Connector Pin Assignments (Default)....................................................................14

Table A-1. Signal Description and Termination .......................................................................................24

Table A-2. Standard 10-Pin TAP Connector ............................................................................................24

Table A-3. Flash Programming TAP 16 Pin Connector .........................................................................27

Table A-4. Signal Description and Termination.......................................................................................27

Table A-5. Flash Programming TAP 20-Pin Connector.........................................................................30

Table A-6. Signal Description and Termination.......................................................................................30

Product Overview

Chapter 1:

Product Overview

Introduction

The PXIE-1149.1/4E High-Speed Boundary-Scan (JTAG) Controller is a member of the Corelis

ScanExpress™ family of scan-based test, analysis, and diagnostic tools. The PXIE-1149.1/4E

interfaces between a PC equipped with a PXIE bus and any IEEE Standard 1149.1 compatible

target. The PXIE-1149.1/4E is designed to control the operation of an IEEE Standard 1149.1

boundary-scan (JTAG) test access port (TAP) by generating the proper signals under software

control to interface with the target device. It contains memory-behind-the-pin architecture and

supports scan operations at continuous JTAG clock (TCK) speeds of up to 75 MHz.

Figure 1-1. PXIE-1149.1/4E Boundary-scan Controller

Product Overview

What is IEEE Standard 1149.1?

The PXIE-1149.1/4E facilitates software-controlled boundary-scan operations per IEEE Standard

1149.1. It provides command access to the target’s Test Access Port (TAP), accessing device

internal registers and on-chip debugger, verifying PCB interconnects, performing functional testing

and debug, without manual probing. The JTAG interface also provides access to internal device

functions that are not accessible via external probing, thus enabling fault isolation within the device

itself. The JTAG interface also enables programming target Flash and CPLD devices, as well as data

download and uploading to and from the target memory devices.

The PXIE-1149.1/4E is often used to perform microprocessor emulation via the device JTAG port.

It is used for firmware development providing single-step, break, and content update/visibility

access.

The IEEE-1149.1TestAccess Port

Interface (TAP)consists offour

required signals:

TestMode Select(TMS)

TestClock (TCK)

TestData In(TDI)

TestData Out(TDO)

A fifthsignal is defined as optional:

TestReset(TRST*)

TMS

TCK

TDI

TDO

TRST*

Figure 1-2. Minimal Test Access Port

Features of the PXIE-1149.1/4E

The Corelis PXIE-1149.1/4E is a sophisticated test controller that can access devices, boards or

systems that are compliant with IEEE Standard 1149.1. The PXIE bus-compatible card supports up

to four JTAG boundary-scan chains (TAPs). In addition, three general purpose, bi-directional

discrete I/O signals per TAP can test or control non-boundary-scan areas of the unit under test

(UUT). The discrete I/O signals can also assist in greatly expediting certain long scan activities,

such as Flash programming. With its software-controlled voltage translating logic for all the above

signals, the PXIE-1149.1/4E can test low-voltage systems.

The PXIE-1149.1/4E also contains several performance enhancing functional sections aimed at

streamlining test vector throughput and emulator target download/upload transfers. Key functional

elements include the TAP controller, and the memory resources that support it. The on-board

memory provides scan data buffering and can at times store the entire scan data for maximum

performance, real-time scan operations.

A test system operates the TAP controller and its associated memory through the host PXIE Port,

while the Test Clock (TCK) rate can operate up to 100 MHz depending on selected signal voltages

and target conditions. The on-board memory elements further decouple the scan operations from

the host software. A hardware state machine that contains status and control registers accessible

through the PCIE interface directly controls all functions of the PXIE-1149.1/4E.

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