abaco systems FMC700 Manuel utilisateur
FMC700 User Manual r1.0
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Table of Contents
Acronyms and related documents..................................................................................... 4
1.1 Acronyms................................................................................................................ 4
1.2 Related Documents................................................................................................. 4
2General description..................................................................................................... 5
3Installation ................................................................................................................... 5
3.1 Requirements and handling instructions.................................................................. 5
4Design .......................................................................................................................... 6
4.1 Physical specifications ............................................................................................ 6
4.1.1 Board Dimensions............................................................................................ 6
4.1.2 Cooling Fan...................................................................................................... 6
5Signals.......................................................................................................................... 7
5.1 User Defined Signal ................................................................................................ 7
5.1.1 HPC HA Signal................................................................................................. 7
5.1.2 HPC LA Signal................................................................................................. 8
5.1.3 LPC LA Signal.................................................................................................. 8
5.1.4 CLK Signal....................................................................................................... 8
5.2 GTX ........................................................................................................................ 9
5.2.1 HPC GTX Signal.............................................................................................. 9
5.2.2 LPC GTX Signal............................................................................................... 9
5.3 Miscellaneous signals ............................................................................................10
5.3.1 PRSNT............................................................................................................10
5.3.2 JTAG...............................................................................................................10
5.3.3 I2C Bus...........................................................................................................10
5.3.4 GA...................................................................................................................11
5.3.5 Power Good Signals .......................................................................................11
6Power...........................................................................................................................11
6.1 HPC Power Signal .................................................................................................11
6.2 LPC Power Signal..................................................................................................11
6.3 VIO_B_M2C...........................................................................................................11
7Layers and Stack up...................................................................................................11
8Environment................................................................................................................11
8.1 Temperature ..........................................................................................................11
8.2 Cooling...................................................................................................................12
8.2.1 Convection cooling..........................................................................................12
9Safety...........................................................................................................................12
10 EMC .............................................................................................................................12
11 Warranty......................................................................................................................12
Appendix A FMC700 Pinout............................................................................................13
FMC700 User Manual r1.0
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Acronyms and related documents
1.1 Acronyms
CFM Cubic Feet per Minute
ESD
ElectroStatic Discharge
HPC
High-Pin Count
FMC
FPGA Mezzanine Card
FPGA Field Programmable Gate Array
JTAG
Join Test Action Group
LPC
Low-Pin Count
PCB
Printed Circuit Board
Table 1: Glossary
1.2 Related Documents
•FPGA Mezzanine Card (FMC) standard ANSI/VITA 57.1-2010
•KC705 Evaluation Board for the Kintex-7 FPGA User Guide, Xilinx
FMC700 User Manual r1.0
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2 General description
The FMC700 is an adapter that recreates an FMC site from the KC705 LPC and HPC FMC
sites in order to offer a HPC FMC site as close as possible to ANSI/VITA 57.1. This adapter
connects to the KC705 via both FMC connectors and has a FMC standard HPC connector on
the other side. The only limitation in regards to the FMC standard is the number of gigabit
transceivers lanes available: the FMC700 offers only 5 gigabit transceiver lanes.
FMC700
KC705
KC705
HPC LPC
FMC Standard (AV57.1)
FMC Standard (AV57.1)
HPC
Figure 1: Adapter block diagram
3 Installation
3.1 Requirements and handling instructions
•The adapter must be installed on FMC connectors on KC705.
•Prevent electrostatic discharges by observing ESD precautions when handling the
card.
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4 Design
4.1 Physical specifications
HPC LPC
FAN
(30x30x10mm)
HPC
FAN
(Air flows up)
7mm
Samtec ASP-134488-01
Samtec ASP-134604-01
Samtec ASP-134486-01
Evercool EC3010M12CA
145 mm
69 mm
84 mm
27.1mm
3.3mm
2.1mm
2.6mm
11.5mm 10.8mm
Figure 2: Floor plan
4.1.1 Board Dimensions
The stacking height is 10mm. For other dimensions, please refer to Figure 2.
4.1.2 Cooling Fan
The adapter has a 30x30x10mm cooling fan to provide additional cooling environment to the
FMC which will be installed on the top. The fan flows 80mA and provides 3.28 CFM. The air
flows up to the FMC and 12VDC is provided to the fan through 3-pin fan connector. Figure 3
shows the 3-pin fan connector. Pin 1 and 2 are connected to ground and 12VDC and pin 3 is
not used. The installed cooling fan is Evercool 30x30x10mm DC Fan (P/N: EC3010M12CA).
The connector is Molex 3-pin connector (P/N: 22-11-2032).
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Figure 3: 3-Pin Fan Connector
5 Signals
All signals from KC705 HPC are fully connected to the FMC. Not-Connected signals from
KC705 are passed by the FMC700. The required signals leading as close as AV57.1 are
connected to the FMC through the FMC700. All pin assignments are summarized on the
Appendix A.
5.1 User Defined Signal
FMC700 HPC KC705 HPC
KC705 LPC
24
HA[00:23] (Bank 18)
HA[00:23]
34
LA[00:33] (Bank 16&17)
LA[00:33]
LA[00:21] (Bank 12&13)
HB[00:21]
12
LA[22:33] (Bank 13)
22
CLK[0:1] CLK[0:1] (Bank 16&17)
2
CLK[2:3]
2
CLK[0:1] (Bank 12&13)
Figure 4: User Defined Signal Routing
5.1.1 HPC HA Signal
All 24 differential HA signals from KC705 HPC are connected to the FMC through the FMC700.
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5.1.2 HPC LA Signal
All 34 differential LA signals from KC705 HPC are connected to the FMC through the FMC700.
5.1.3 LPC LA Signal
22 differential LA signals (LA00 to LA21) from KC705 LPC are connected to the FMC through
the FMC700 and remaining LA signals (LA22 to LA33) are discarded. LPC_LA bank has 4
clock capable pairs (CC) and HPC_HB has 3 CC. Following table shows the CC connections.
LA BANK LPC_LA00_CC LPC_LA01_CC LPC_LA017_CC LPC_LA018_CC
HB BANK HPC_HB00_CC HPC_HB06_CC HPC_HB17_CC HPC_HB18
Table 2: CC connections between LA and HB banks
5.1.4 CLK Signal
FMC700 supports 2 differential clock signals from KC705 HPC through CLK[0:1]_M2C_P/N
and other 2 differential clock signals from KC705 LPC through CLK[2:3]_BIDIR_P/N.
CLK_DIR determines the direction of FMC clock signals. CLK_DIR is unconnected in KC705,
which enables all reference clock signal pairs are driven from the IO Mezzanine Module to the
carrier card.
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5.2 GTX
FMC700 HPC KC705 HPC
KC705 LPC
DP_M2C [0:3] (BANK 118)
DP_M2C [0:3]
DP_M2C [0] (BANK 117)
DP_C2M[0] (BANK 117)
GBTCLK_M2C GBTCLK_M2C (BANK 118)
2
DP_C2M [0:3] (BANK 118)DP_C2M [0:3]
4
4
DP_M2C [5:9] (BANK 118)
DP_C2M [5:9] (BANK 118)
5
5
GBTCLK_M2C (BANK 118)
DP_M2C [4]
DP_C2M [4]
DP_M2C [5:9]
DP_C2M [5:9]
Figure 5: GTX Signal Routing
5.2.1 HPC GTX Signal
All differential GTX signals from KC705 HPC are fully connected to the FMC through the
FMC700. KC705 provides only 4 differential GTX signals (DP [0:3]).
5.2.2 LPC GTX Signal
Differential GTX signals from KC705 LPC are routed to the FMC through the FMC700. These
DP signals are connected to bank 117 while HPC GTX clock signals are connected to bank
118. This allows using HPC GTX clocks signals for LPC GTX signals.
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5.3 Miscellaneous signals
FMC700 HPC KC705 HPC
KC705 LPC
PG_M2C (BANK 15)
PG_M2C
PG_C2M
TDI
PG_C2M PG_C2M
TDI
TDI
TDO
TDO
TDO
SCL
SDA
SCL
SDA
GA[0:1]
GA[0:1]
PRSNT PRSNT
PRSNT
TCK
TMS
TCK
TMS
SCL
SDA
GA[0:1]
TCK
TMS
Figure 6: PRSNT, JTAG, I2C, GA, PG Signal Routing
5.3.1 PRSNT
Present signals from both KC705 HPC and LPC are shorted together and connected to the
FMC.
5.3.2 JTAG
Only JTAG signals from KC705 HPC are connected to the FMC. TDI and TDO from KC705
LPC are shorted and the other signals are discarded.
5.3.3 I2C Bus
Only I2C bus signals from KC705 HPC are connected to the FMC and the signals from KC705
LPC are discarded.
Table des matières
